Placement Problems Arising From Automatic Logic Compilation (thesis)

Report ID: TR-201-89

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Author: Lin, William W.

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Date: 1989-06-00

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Pages: 152

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Abstract:

Automatic logic compilation is the process of taking an input description consisting of Boolean logic equations and outputting an IC layout mask description implementing the equations. There are a number of problems that must be solved by the compiler. In this thesis, we shall discuss some placement problems that arose during the building of a logic compiler, the Weinberger Array Generator.