Heterogeneous architectures are especially attractive as they can provide high performance and energy-efficiency for both general-purpose applications as well as high throughput applications. However, these architectures introduce several new challenges: including programming, determining power and performance trade-offs and developing hardware solutions that exploit the underlying heterogeneity.
In this talk I will present some of our recent work that reduces the software effort required in programming such architectures, and provides hints to estimate the performance and power behavior of CPUs , GPUs or CPUs+GPUs. I will also discuss architecture solutions that improve overall system performance by taking into account the difference in characteristics of CPU and GPU applications, and optimizing the cache partitioning, prefetching, and DRAM scheduling to best suit the workload needs.
Hyesoon Kim is an Assistant professor in the School of Computer Science at Georgia Institute of Technology. Her research interests include high-performance energy-efficient heterogeneous architectures, programmer-compiler-microarchitecture interaction and developing tools to help parallel programming. She received a BA in mechanical engineering from Korea Advanced Institute of Science and Technology (KAIST), an MS in mechanical engineering from Seoul National University, and an MS and a Ph.D in computer engineering at The University of Texas at Austin. She is a recipient of the NSF career award in 2011.